6#ifndef JLM_LLVM_IR_TRACE_HPP
7#define JLM_LLVM_IR_TRACE_HPP
66 [[nodiscard]] TraceStepResult
90 bool mayEnterSubregions,
96 bool mayEnterSubregions,
109std::optional<int64_t>
128 [[nodiscard]] std::optional<int64_t>
132 std::optional<std::vector<GetElementPtrOperation::Constant>>
gepConstants{};
145[[nodiscard]] TracedPointerOrigin
165 std::unordered_map<const rvsdg::Output *, std::optional<int64_t>>
TopOrigins{};
182 TracedPointerOrigin p,
183 TraceCollection & traceCollection,
184 size_t maxTraceCollectionSize);
bool isTracingThroughHoistBarriers() const noexcept
bool isTracingThroughLoadedStates() const noexcept
bool traceThroughHoistBarriers_
void setTracingThroughHoistBarriers(const bool traceThroughHoistBarriers)
bool traceThroughLoadedStates_
TraceStepResult traceStep(rvsdg::Output &output, BackEdgeState backEdgeState, const rvsdg::Region *withinRegion) override
void setTraceThroughLoadedStates(const bool traceThroughLoadedStates)
Represent acyclic RVSDG subgraphs.
Global memory state passed between functions.
bool TraceAllPointerOrigins(TracedPointerOrigin p, TraceCollection &traceCollection, const size_t maxTraceCollectionSize)
rvsdg::Output & traceOutput(rvsdg::Output &output, bool mayEnterSubregions, const rvsdg::Region *withinRegion)
TracedPointerOrigin TracePointerOriginPrecise(const rvsdg::Output &p)
std::optional< int64_t > tryGetConstantSignedInteger(const rvsdg::Output &output)
std::unordered_map< const rvsdg::Output *, std::optional< int64_t > > TopOrigins
std::unordered_map< const rvsdg::Output *, std::optional< int64_t > > AllTracedOutputs
std::optional< std::vector< GetElementPtrOperation::Constant > > gepConstants
const rvsdg::Output * BasePointer
std::optional< int64_t > getOffsetInBytes() const noexcept